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[/] [ethmac/] [trunk/] [rtl/] - Rev 367

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Rev Log message Author Age Path
367 Remove Wishbone B3 define. For classic wishbone, these ports can just be ignored olof 4525d 20h /ethmac/trunk/rtl/
366 Readded eth_top.v with a deprecation warning olof 4650d 00h /ethmac/trunk/rtl/
365 Whitespace cleanup olof 4651d 00h /ethmac/trunk/rtl/
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4651d 21h /ethmac/trunk/rtl/
360 Added partial implementation of the debug register from ORPSoC olof 4653d 05h /ethmac/trunk/rtl/
359 Verilator linting fixes olof 4655d 07h /ethmac/trunk/rtl/
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4656d 21h /ethmac/trunk/rtl/
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4656d 21h /ethmac/trunk/rtl/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4656d 23h /ethmac/trunk/rtl/
355 Import Julius Baxter's verilator hints from ORPSoC olof 4657d 00h /ethmac/trunk/rtl/
354 Whitespace cleanup olof 4657d 00h /ethmac/trunk/rtl/
353 Inherit fixes for bit width of constants from ORPSoC olof 4659d 02h /ethmac/trunk/rtl/
352 Removed delayed assignments from rtl code olof 4663d 08h /ethmac/trunk/rtl/
351 Turn defines into parameters in eth_cop olof 4671d 21h /ethmac/trunk/rtl/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4671d 22h /ethmac/trunk/rtl/
349 Make all parameters configurable from top level olof 4672d 23h /ethmac/trunk/rtl/
346 Updated project location olof 4674d 00h /ethmac/trunk/rtl/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4684d 00h /ethmac/trunk/rtl/
338 root 5478d 03h /ethmac/trunk/rtl/
335 New directory structure. root 5535d 08h /ethmac/trunk/rtl/
333 Some small fixes + some troubles fixed. igorm 6983d 22h /ethmac/trunk/rtl/
332 Case statement improved for synthesys. igorm 6997d 03h /ethmac/trunk/rtl/
330 Warning fixes. igorm 7012d 05h /ethmac/trunk/rtl/
329 Defer indication fixed. igorm 7012d 06h /ethmac/trunk/rtl/
328 Delayed CRC fixed. igorm 7012d 07h /ethmac/trunk/rtl/
327 Defer indication fixed. igorm 7012d 07h /ethmac/trunk/rtl/
326 Delayed CRC fixed. igorm 7012d 07h /ethmac/trunk/rtl/
325 Defer indication fixed. igorm 7012d 07h /ethmac/trunk/rtl/
323 Accidently deleted line put back. igorm 7309d 07h /ethmac/trunk/rtl/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries		 igorm 7313d 03h /ethmac/trunk/rtl/

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