URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 111

Rev	Log message	Author	Age	Path
86	Big Endian problem when sending frames fixed.	mohor	8092d 22h	/ethmac/trunk/rtl/verilog/
85	Log info was missing.	mohor	8098d 08h	/ethmac/trunk/rtl/verilog/
84	LinkFail signal was not latching appropriate bit.	mohor	8098d 08h	/ethmac/trunk/rtl/verilog/
83	MAC address recognition was not correct (bytes swaped).	mohor	8098d 08h	/ethmac/trunk/rtl/verilog/
82	Byte ordering changed (Big Endian used). casex changed with case because Xilinx Foundation had problems. Tested in HW. It WORKS.	mohor	8098d 10h	/ethmac/trunk/rtl/verilog/
80	Small fixes for external/internal DMA missmatches.	mohor	8102d 12h	/ethmac/trunk/rtl/verilog/
79	RetryCntLatched was unused and removed from design	mohor	8102d 12h	/ethmac/trunk/rtl/verilog/
78	WB_SEL_I was unused and removed from design	mohor	8102d 12h	/ethmac/trunk/rtl/verilog/
77	Interrupts changed	mohor	8102d 12h	/ethmac/trunk/rtl/verilog/
76	Interrupts changed in the top file	mohor	8102d 13h	/ethmac/trunk/rtl/verilog/