URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 350

Rev	Log message	Author	Age	Path
304	WISHBONE slave changed and tested from only 32-bit accesss to byte access.	tadejm	7480d 16h	/ethmac/trunk/rtl/verilog/
302	mbist signals updated according to newest convention	markom	7507d 03h	/ethmac/trunk/rtl/verilog/
301	Update RxEnSync only when mrxdv_pad_i is inactive (LOW).	knguyen	7517d 19h	/ethmac/trunk/rtl/verilog/
297	Artisan ram instance added.	simons	7570d 18h	/ethmac/trunk/rtl/verilog/
288	This file was not part of the RTL before, but it should be here.	simons	7606d 20h	/ethmac/trunk/rtl/verilog/
286	Define file in eth_cop.v is changed to eth_defines.v. Some defines were moved from tb_eth_defines.v to eth_defines.v.	mohor	7632d 23h	/ethmac/trunk/rtl/verilog/
285	Binary operator used instead of unary (xnor).	mohor	7632d 23h	/ethmac/trunk/rtl/verilog/
284	Busy was set 2 cycles too late. Reported by Dennis Scott.	mohor	7661d 00h	/ethmac/trunk/rtl/verilog/
283	RxBDAddress was updated also when value to r_TxBDNum was written with greater value than allowed.	mohor	7688d 18h	/ethmac/trunk/rtl/verilog/
280	Reset has priority in some flipflops.	mohor	7766d 20h	/ethmac/trunk/rtl/verilog/