OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 357

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4660d 02h /ethmac/trunk/rtl/verilog
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4660d 04h /ethmac/trunk/rtl/verilog
355 Import Julius Baxter's verilator hints from ORPSoC olof 4660d 05h /ethmac/trunk/rtl/verilog
354 Whitespace cleanup olof 4660d 05h /ethmac/trunk/rtl/verilog
353 Inherit fixes for bit width of constants from ORPSoC olof 4662d 07h /ethmac/trunk/rtl/verilog
352 Removed delayed assignments from rtl code olof 4666d 13h /ethmac/trunk/rtl/verilog
351 Turn defines into parameters in eth_cop olof 4675d 02h /ethmac/trunk/rtl/verilog
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4675d 03h /ethmac/trunk/rtl/verilog
349 Make all parameters configurable from top level olof 4676d 04h /ethmac/trunk/rtl/verilog
346 Updated project location olof 4677d 05h /ethmac/trunk/rtl/verilog
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4687d 05h /ethmac/trunk/rtl/verilog
338 root 5481d 08h /ethmac/trunk/rtl/verilog
335 New directory structure. root 5538d 13h /ethmac/trunk/rtl/verilog
333 Some small fixes + some troubles fixed. igorm 6987d 03h /ethmac/trunk/rtl/verilog
332 Case statement improved for synthesys. igorm 7000d 08h /ethmac/trunk/rtl/verilog
330 Warning fixes. igorm 7015d 10h /ethmac/trunk/rtl/verilog
329 Defer indication fixed. igorm 7015d 11h /ethmac/trunk/rtl/verilog
328 Delayed CRC fixed. igorm 7015d 12h /ethmac/trunk/rtl/verilog
327 Defer indication fixed. igorm 7015d 12h /ethmac/trunk/rtl/verilog
326 Delayed CRC fixed. igorm 7015d 12h /ethmac/trunk/rtl/verilog

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.