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[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 76

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Rev Log message Author Age Path
54 Addition of new module eth_addrcheck.v billditt 8123d 00h /ethmac/trunk/rtl/verilog/
53 Addition of new module eth_addrcheck.v billditt 8123d 00h /ethmac/trunk/rtl/verilog/
52 Modified for Address Checking,
addition of eth_addrcheck.v
billditt 8123d 01h /ethmac/trunk/rtl/verilog/
50 checks destination address for Unicast, Multicast and Broadcast ops billditt 8123d 02h /ethmac/trunk/rtl/verilog/
48 RxOverRun added to statuses. mohor 8125d 04h /ethmac/trunk/rtl/verilog/
47 HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.
mohor 8125d 04h /ethmac/trunk/rtl/verilog/
46 HASH0 and HASH1 registers added. mohor 8125d 04h /ethmac/trunk/rtl/verilog/
43 Tx status is written back to the BD. mohor 8126d 12h /ethmac/trunk/rtl/verilog/
42 Rx status is written back to the BD. mohor 8129d 05h /ethmac/trunk/rtl/verilog/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8131d 07h /ethmac/trunk/rtl/verilog/

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