OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 77

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
77 Interrupts changed mohor 8146d 15h /ethmac/trunk/rtl/verilog/
76 Interrupts changed in the top file mohor 8146d 15h /ethmac/trunk/rtl/verilog/
75 r_Bro is used for accepting/denying frames mohor 8146d 15h /ethmac/trunk/rtl/verilog/
74 Reset values are passed to registers through parameters mohor 8146d 15h /ethmac/trunk/rtl/verilog/
73 Number of interrupts changed mohor 8146d 15h /ethmac/trunk/rtl/verilog/
72 Retry is not activated when a Tx Underrun occured mohor 8150d 19h /ethmac/trunk/rtl/verilog/
70 Small fixes. mohor 8154d 21h /ethmac/trunk/rtl/verilog/
69 Define missmatch fixed. mohor 8155d 18h /ethmac/trunk/rtl/verilog/
68 Registered trimmed. Unused registers removed. mohor 8156d 17h /ethmac/trunk/rtl/verilog/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8156d 18h /ethmac/trunk/rtl/verilog/
65 Testbench fixed, code simplified, unused signals removed. mohor 8157d 00h /ethmac/trunk/rtl/verilog/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8157d 14h /ethmac/trunk/rtl/verilog/
63 RxAbort is connected differently. mohor 8157d 18h /ethmac/trunk/rtl/verilog/
62 RxAbort is an output. No need to have is declared as wire. mohor 8157d 18h /ethmac/trunk/rtl/verilog/
61 RxStartFrm cleared when abort or retry comes. mohor 8157d 19h /ethmac/trunk/rtl/verilog/
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8157d 19h /ethmac/trunk/rtl/verilog/
59 Changes that were lost when updating from 1.11 to 1.14 fixed. mohor 8157d 20h /ethmac/trunk/rtl/verilog/
58 File format changed. mohor 8157d 20h /ethmac/trunk/rtl/verilog/
57 Format of the file changed a bit. mohor 8157d 20h /ethmac/trunk/rtl/verilog/
56 File format fixed a bit. mohor 8157d 20h /ethmac/trunk/rtl/verilog/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.