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Rev Log message Author Age Path
310 More signals. tadejm 7386d 10h /ethmac/trunk/sim/
309 Update file list files for different RAM models with byte select accessing. tadejm 7386d 10h /ethmac/trunk/sim/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 7386d 10h /ethmac/trunk/sim/
299 Artisan RAMs added. mohor 7493d 11h /ethmac/trunk/sim/
295 Few minor changes. tadejm 7500d 09h /ethmac/trunk/sim/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 7502d 09h /ethmac/trunk/sim/
293 initial. tadejm 7526d 07h /ethmac/trunk/sim/
292 Corrected mistake. tadejm 7526d 07h /ethmac/trunk/sim/
291 initial tadejm 7526d 08h /ethmac/trunk/sim/
290 Additional checking for FAILED tests added - for ATS. tadejm 7526d 09h /ethmac/trunk/sim/
225 Some minor changes. tadejm 7799d 07h /ethmac/trunk/sim/
224 Signals for a wave window in Modelsim. tadejm 7799d 09h /ethmac/trunk/sim/
217 Bist supported. mohor 7806d 09h /ethmac/trunk/sim/
215 Bist supported. mohor 7806d 10h /ethmac/trunk/sim/
208 Virtual Silicon RAMs moved to lib directory tadej 7824d 03h /ethmac/trunk/sim/
207 Virtual Silicon RAM support fixed tadej 7824d 04h /ethmac/trunk/sim/
206 Virtual Silicon RAM added to the simulation. mohor 7824d 04h /ethmac/trunk/sim/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7824d 04h /ethmac/trunk/sim/
187 _info file added. mohor 7830d 03h /ethmac/trunk/sim/
186 Macro for testbench (DO file). mohor 7830d 04h /ethmac/trunk/sim/

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