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URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [sim/] [rtl_sim/] [ncsim_sim/] [bin/] - Rev 364

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Rev Log message Author Age Path
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4720d 16h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4725d 17h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
338 root 5546d 21h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
335 New directory structure. root 5604d 02h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
309 Update file list files for different RAM models with byte select accessing. tadejm 7525d 00h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 7525d 00h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
208 Virtual Silicon RAMs moved to lib directory tadej 7962d 17h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
207 Virtual Silicon RAM support fixed tadej 7962d 17h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
206 Virtual Silicon RAM added to the simulation. mohor 7962d 17h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
176 lists changed to new directory structure mohor 7972d 23h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
173 Keeps the directory mohor 7972d 23h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/
171 NCSIM simulation environment added. mohor 7973d 00h /ethmac/trunk/sim/rtl_sim/ncsim_sim/bin/

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