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[/] [ethmac/] [trunk] - Rev 260

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Rev Log message Author Age Path
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.		 mohor 7841d 02h /ethmac/trunk
259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).		 mohor 7841d 15h /ethmac/trunk
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.		 mohor 7841d 15h /ethmac/trunk
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7841d 15h /ethmac/trunk
255 TPauseRq synchronized to tx_clk. mohor 7841d 15h /ethmac/trunk
254 Temp version. mohor 7842d 19h /ethmac/trunk
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7842d 21h /ethmac/trunk
252 Just some updates. tadejm 7842d 22h /ethmac/trunk
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7842d 22h /ethmac/trunk
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7842d 22h /ethmac/trunk
248 wb_rst_i is used for MIIM reset. mohor 7843d 22h /ethmac/trunk
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7847d 01h /ethmac/trunk
245 Rev 1.7. mohor 7847d 19h /ethmac/trunk
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7847d 21h /ethmac/trunk
243 Late collision is not reported any more. tadejm 7848d 02h /ethmac/trunk
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7848d 17h /ethmac/trunk
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7848d 17h /ethmac/trunk
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7848d 17h /ethmac/trunk
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7848d 17h /ethmac/trunk
238 Defines fixed to use generic RAM by default. mohor 7860d 21h /ethmac/trunk
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7863d 03h /ethmac/trunk
235 rev 4. mohor 7863d 17h /ethmac/trunk
234 Figure list assed to the revision 3. mohor 7864d 01h /ethmac/trunk
233 Revision 0.3 released. Some figures added. mohor 7864d 02h /ethmac/trunk
232 fpga define added. mohor 7868d 21h /ethmac/trunk
231 Description of Core Modules added (figure). mohor 7870d 22h /ethmac/trunk
229 case changed to casex. mohor 7874d 19h /ethmac/trunk
227 Changed BIST scan signals. tadejm 7874d 22h /ethmac/trunk
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7875d 00h /ethmac/trunk
225 Some minor changes. tadejm 7875d 00h /ethmac/trunk

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