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[/] [ethmac] - Rev 361

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Rev Log message Author Age Path
361 created branch unneback unneback 4652d 22h /ethmac
360 Added partial implementation of the debug register from ORPSoC olof 4653d 20h /ethmac
359 Verilator linting fixes olof 4655d 23h /ethmac
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4657d 13h /ethmac
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4657d 13h /ethmac
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4657d 15h /ethmac
355 Import Julius Baxter's verilator hints from ORPSoC olof 4657d 15h /ethmac
354 Whitespace cleanup olof 4657d 16h /ethmac
353 Inherit fixes for bit width of constants from ORPSoC olof 4659d 17h /ethmac
352 Removed delayed assignments from rtl code olof 4663d 23h /ethmac
351 Turn defines into parameters in eth_cop olof 4672d 13h /ethmac
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4672d 14h /ethmac
349 Make all parameters configurable from top level olof 4673d 14h /ethmac
348 Added option to dump VCD files olof 4674d 13h /ethmac
347 Added information about running with Icarus Verilog olof 4674d 14h /ethmac
346 Updated project location olof 4674d 16h /ethmac
345 Temporarily disable failing tests olof 4674d 18h /ethmac
344 bit 9 in phy control register is self clearing olof 4680d 20h /ethmac
343 Address miss should not be asserted on short frames olof 4684d 16h /ethmac
342 Added cast to avoid inequality when comparing different data types olof 4684d 16h /ethmac
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4684d 16h /ethmac
340 Don't fail if log dir already exists olof 4685d 13h /ethmac
339 Added basic support for Icarus Verilog olof 4686d 13h /ethmac
338 root 5478d 18h /ethmac
337 root 5534d 20h /ethernet
336 Added old uploaded documents to new repository. root 5536d 00h /ethernet
335 New directory structure. root 5536d 00h /ethernet

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