URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac] - Rev 361

Rev	Log message	Author	Age	Path
361	created branch unneback	unneback	4672d 12h	/ethmac
360	Added partial implementation of the debug register from ORPSoC	olof	4673d 10h	/ethmac
359	Verilator linting fixes	olof	4675d 12h	/ethmac
358	Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version	olof	4677d 03h	/ethmac
357	Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC	olof	4677d 03h	/ethmac
356	Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure	olof	4677d 04h	/ethmac
355	Import Julius Baxter's verilator hints from ORPSoC	olof	4677d 05h	/ethmac
354	Whitespace cleanup	olof	4677d 06h	/ethmac
353	Inherit fixes for bit width of constants from ORPSoC	olof	4679d 07h	/ethmac
352	Removed delayed assignments from rtl code	olof	4683d 13h	/ethmac
351	Turn defines into parameters in eth_cop	olof	4692d 03h	/ethmac
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4692d 04h	/ethmac
349	Make all parameters configurable from top level	olof	4693d 04h	/ethmac
348	Added option to dump VCD files	olof	4694d 03h	/ethmac
347	Added information about running with Icarus Verilog	olof	4694d 04h	/ethmac
346	Updated project location	olof	4694d 06h	/ethmac
345	Temporarily disable failing tests	olof	4694d 07h	/ethmac
344	bit 9 in phy control register is self clearing	olof	4700d 09h	/ethmac
343	Address miss should not be asserted on short frames	olof	4704d 05h	/ethmac
342	Added cast to avoid inequality when comparing different data types	olof	4704d 06h	/ethmac