OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 116

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 6848d 07h /
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 6849d 05h /
114 EXTERNAL_DMA removed. External DMA not supported. mohor 6850d 02h /
113 RxPointer bug fixed. mohor 6856d 18h /
112 Previous bug wasn't succesfully removed. Now fixed. mohor 6857d 08h /
111 Master state machine had a bug when switching from master write to
master read.
mohor 6857d 21h /
110 m_wb_cyc_o signal released after every single transfer. mohor 6858d 01h /
109 Comment removed. mohor 6858d 01h /
108 Testbench supports unaligned accesses. mohor 6925d 11h /
107 TX_BUF_BASE changed. mohor 6925d 11h /
106 Outputs registered. Reset changed for eth_wishbone module. mohor 6925d 11h /
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 6934d 12h /
104 FCS should not be included in NibbleMinFl. mohor 6936d 06h /
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 6936d 07h /
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 6936d 07h /
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 6936d 07h /
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 6936d 08h /
99 Document revised. mohor 6943d 06h /
98 Document revised. mohor 6943d 07h /
97 Small typo fixed. lampret 6960d 05h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.