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Rev Log message Author Age Path
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7186d 09h /
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7186d 09h /
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
mohor 7186d 09h /
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 7189d 11h /
201 Core size added to the document. mohor 7189d 11h /
200 File with lower case checked in instead. mohor 7189d 11h /
199 Datasheet name changed to lower case name. mohor 7189d 11h /
198 Removed file. File with name in lower case will be added instead. mohor 7189d 11h /
197 Ethernet Data Sheet. mohor 7189d 11h /
196 Ethernet product brief. mohor 7189d 13h /
195 Product brief removed because it is the same as Datasheet. mohor 7189d 13h /
194 Full duplex tests modified and testbench bug repaired. tadej 7189d 13h /
193 Temp version (backup). mohor 7189d 15h /
192 Some additional reports added tadej 7191d 10h /
191 Bug repaired in eth_phy device tadej 7191d 10h /
190 Several information added to the file. mohor 7191d 11h /
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 7191d 11h /
188 PHY changed. tadej 7192d 08h /
187 _info file added. mohor 7192d 08h /
186 Macro for testbench (DO file). mohor 7192d 09h /
185 Directory keeper. mohor 7192d 09h /
184 Modelsim simulation environment should be ready now. mohor 7192d 09h /
183 Modelsim environment added. mohor 7192d 09h /
182 Full duplex test improved. tadej 7193d 10h /
181 MIIM test look better. mohor 7193d 13h /
180 Bench outputs data to display every 128 bytes. mohor 7196d 08h /
179 Beautiful tests merget together mohor 7196d 09h /
178 Rearanged testcases mohor 7196d 09h /
177 Bug in MIIM fixed. mohor 7196d 13h /
176 lists changed to new directory structure mohor 7196d 15h /

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