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Rev Log message Author Age Path
208 Virtual Silicon RAMs moved to lib directory tadej 8113d 16h /
207 Virtual Silicon RAM support fixed tadej 8113d 16h /
206 Virtual Silicon RAM added to the simulation. mohor 8113d 16h /
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 8113d 17h /
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 8113d 17h /
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 8113d 17h /
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 8116d 18h /
201 Core size added to the document. mohor 8116d 19h /
200 File with lower case checked in instead. mohor 8116d 19h /
199 Datasheet name changed to lower case name. mohor 8116d 19h /
198 Removed file. File with name in lower case will be added instead. mohor 8116d 19h /
197 Ethernet Data Sheet. mohor 8116d 19h /
196 Ethernet product brief. mohor 8116d 20h /
195 Product brief removed because it is the same as Datasheet. mohor 8116d 20h /
194 Full duplex tests modified and testbench bug repaired. tadej 8116d 21h /
193 Temp version (backup). mohor 8116d 22h /
192 Some additional reports added tadej 8118d 17h /
191 Bug repaired in eth_phy device tadej 8118d 17h /
190 Several information added to the file. mohor 8118d 18h /
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 8118d 18h /

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