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Rev Log message Author Age Path
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 7902d 18h /
208 Virtual Silicon RAMs moved to lib directory tadej 7918d 12h /
207 Virtual Silicon RAM support fixed tadej 7918d 12h /
206 Virtual Silicon RAM added to the simulation. mohor 7918d 13h /
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7918d 13h /
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7918d 13h /
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
mohor 7918d 13h /
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 7921d 14h /
201 Core size added to the document. mohor 7921d 15h /
200 File with lower case checked in instead. mohor 7921d 15h /

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