URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 240

Rev	Log message	Author	Age	Path
240	All modules are reset with wb_rst instead of the r_Rst. Exception is MII module.	tadejm	7834d 20h	/
239	RxError is not generated when small frame reception is enabled and small frames are received.	tadejm	7834d 20h	/
238	Defines fixed to use generic RAM by default.	mohor	7847d 00h	/
237	This commit was manufactured by cvs2svn to create tag 'rel_9'.		7849d 05h	/
236	State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery.	mohor	7849d 05h	/
235	rev 4.	mohor	7849d 20h	/
234	Figure list assed to the revision 3.	mohor	7850d 04h	/
233	Revision 0.3 released. Some figures added.	mohor	7850d 04h	/
232	fpga define added.	mohor	7854d 23h	/
231	Description of Core Modules added (figure).	mohor	7857d 00h	/
230	This commit was manufactured by cvs2svn to create tag 'rel_8'.		7860d 21h	/
229	case changed to casex.	mohor	7860d 21h	/
228	This commit was manufactured by cvs2svn to create tag 'rel_7'.		7861d 01h	/
227	Changed BIST scan signals.	tadejm	7861d 01h	/
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	7861d 02h	/
225	Some minor changes.	tadejm	7861d 03h	/
224	Signals for a wave window in Modelsim.	tadejm	7861d 04h	/
223	Some code changed due to bug fixes.	tadejm	7861d 04h	/
222	This commit was manufactured by cvs2svn to create tag 'rel_6'.		7865d 02h	/
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	7865d 02h	/