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Rev Log message Author Age Path
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4683d 21h /
340 Don't fail if log dir already exists olof 4684d 19h /
339 Added basic support for Icarus Verilog olof 4685d 18h /
338 root 5478d 00h /
337 root 5534d 02h /
336 Added old uploaded documents to new repository. root 5535d 05h /
335 New directory structure. root 5535d 05h /
334 Minor fixes for Icarus simulator. igorm 6983d 07h /
333 Some small fixes + some troubles fixed. igorm 6983d 19h /
332 Case statement improved for synthesys. igorm 6997d 00h /
331 Tests for delayed CRC and defer indication added. igorm 7012d 02h /
330 Warning fixes. igorm 7012d 02h /
329 Defer indication fixed. igorm 7012d 04h /
328 Delayed CRC fixed. igorm 7012d 04h /
327 Defer indication fixed. igorm 7012d 04h /
326 Delayed CRC fixed. igorm 7012d 04h /
325 Defer indication fixed. igorm 7012d 04h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 7309d 05h /
323 Accidently deleted line put back. igorm 7309d 05h /
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 7313d 00h /
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 7313d 00h /
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 7313d 03h /
319 Latest Ethernet IP core testbench. tadejm 7343d 23h /
318 Latest Ethernet IP core testbench. tadejm 7343d 23h /
317 Multicast detection fixed. Only the LSB of the first byte is checked. igorm 7353d 06h /
316 This commit was manufactured by cvs2svn to create tag 'rel_25'. 7456d 02h /
315 Updated testbench. Some more testcases, some repaired. tadejm 7456d 02h /
314 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7456d 02h /
313 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7456d 02h /
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 7456d 02h /

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