OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 350

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4675d 05h /
349 Make all parameters configurable from top level olof 4676d 06h /
348 Added option to dump VCD files olof 4677d 05h /
347 Added information about running with Icarus Verilog olof 4677d 06h /
346 Updated project location olof 4677d 08h /
345 Temporarily disable failing tests olof 4677d 09h /
344 bit 9 in phy control register is self clearing olof 4683d 11h /
343 Address miss should not be asserted on short frames olof 4687d 07h /
342 Added cast to avoid inequality when comparing different data types olof 4687d 07h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4687d 08h /
340 Don't fail if log dir already exists olof 4688d 05h /
339 Added basic support for Icarus Verilog olof 4689d 04h /
338 root 5481d 10h /
337 root 5537d 12h /
336 Added old uploaded documents to new repository. root 5538d 15h /
335 New directory structure. root 5538d 15h /
334 Minor fixes for Icarus simulator. igorm 6986d 17h /
333 Some small fixes + some troubles fixed. igorm 6987d 05h /
332 Case statement improved for synthesys. igorm 7000d 11h /
331 Tests for delayed CRC and defer indication added. igorm 7015d 12h /
330 Warning fixes. igorm 7015d 13h /
329 Defer indication fixed. igorm 7015d 14h /
328 Delayed CRC fixed. igorm 7015d 14h /
327 Defer indication fixed. igorm 7015d 14h /
326 Delayed CRC fixed. igorm 7015d 14h /
325 Defer indication fixed. igorm 7015d 15h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 7312d 15h /
323 Accidently deleted line put back. igorm 7312d 15h /
322 This commit was manufactured by cvs2svn to create tag 'rel_26'. 7316d 10h /
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 7316d 10h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.