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[/] [fade_ether_protocol/] [trunk/] [stable_jumbo_frames_version/] [fpga/] [src/] [AFCK/] [vio_0/] [vio_0.xci] - Rev 41

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41 The AFCK project upgraded to Vivado 2016.4 wzab 2671d 12h /fade_ether_protocol/trunk/stable_jumbo_frames_version/fpga/src/AFCK/vio_0/vio_0.xci
40 The "jumbo frame version" renamed from "experimental" to "stable". wzab 2671d 17h /fade_ether_protocol/trunk/stable_jumbo_frames_version/fpga/src/AFCK/vio_0/vio_0.xci
37 Added new design for AFCK board, which uses 8 10 Gbps links.
Additionally added I2C control of the AFCK Si57x based clock.
The I2C controller is driven via VIO blocks controlled by JTAG
interface from Vivado Tcl console.
Tcl scripts are in the fpga/src/AFCK/i2c_tools directory.
To configure clock to 156.25MHz, and to route it to links,
change directory to fpga/src/AFCK/i2c_tools and do
"source start_10g_links.tcl".
After the clock is reprogrammed, reconfigure the FPGA again
(it seems, that there is a problem with reseting links after
clock is reconfigured).
wzab 3273d 06h /fade_ether_protocol/trunk/stable_jumbo_frames_version/fpga/src/AFCK/vio_0/vio_0.xci

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