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[/] [gpio/] [tags/] [rel_1/] [rtl/] [verilog/] - Rev 65

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Rev Log message Author Age Path
65 New directory structure. root 5548d 04h /gpio/tags/rel_1/rtl/verilog/
28 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8047d 08h /gpio/tags/rel_1/rtl/verilog/
27 negedge flops are enabled by default. lampret 8047d 08h /gpio/tags/rel_1/rtl/verilog/
26 Removed zero padding as per Avi Shamli suggestion. lampret 8101d 05h /gpio/tags/rel_1/rtl/verilog/
25 Ports changed per Ran Aviram suggestions. lampret 8101d 05h /gpio/tags/rel_1/rtl/verilog/
24 Interrupt is asserted only when an input changes (code patch by Jacob Gorban) lampret 8105d 22h /gpio/tags/rel_1/rtl/verilog/
23 Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification. lampret 8159d 07h /gpio/tags/rel_1/rtl/verilog/
22 Fixed two typos. lampret 8179d 09h /gpio/tags/rel_1/rtl/verilog/
21 Added RGPIO_INTS. lampret 8179d 09h /gpio/tags/rel_1/rtl/verilog/
20 Fixing style. lampret 8192d 06h /gpio/tags/rel_1/rtl/verilog/
19 Fixed bug when wb_inta_o is registered (GPIO_WB_REGISTERED_OUTPUTS) lampret 8192d 19h /gpio/tags/rel_1/rtl/verilog/
17 Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS. lampret 8220d 00h /gpio/tags/rel_1/rtl/verilog/
15 Fixed wb_err_o. lampret 8235d 00h /gpio/tags/rel_1/rtl/verilog/
14 Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v. lampret 8277d 07h /gpio/tags/rel_1/rtl/verilog/

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