URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [tags/] [rel_13/] [bench/] [verilog/] - Rev 65

Rev	Log message	Author	Age	Path
65	New directory structure.	root	5545d 20h	/gpio/tags/rel_13/bench/verilog/
59	This commit was manufactured by cvs2svn to create tag 'rel_13'.		7455d 05h	/gpio/tags/rel_13/bench/verilog/
56	added ECLK and NEC registers, all tests passed.	gorand	7455d 05h	/gpio/tags/rel_13/bench/verilog/
47	small "names" modification...	gorand	7472d 06h	/gpio/tags/rel_13/bench/verilog/
45	small changes, for VATS...	gorand	7473d 02h	/gpio/tags/rel_13/bench/verilog/
41	small changes, to satisfy VATS..	gorand	7483d 04h	/gpio/tags/rel_13/bench/verilog/
37	tests passed.	gorand	7491d 19h	/gpio/tags/rel_13/bench/verilog/
26	Removed zero padding as per Avi Shamli suggestion.	lampret	8098d 21h	/gpio/tags/rel_13/bench/verilog/
22	Fixed two typos.	lampret	8177d 01h	/gpio/tags/rel_13/bench/verilog/
21	Added RGPIO_INTS.	lampret	8177d 01h	/gpio/tags/rel_13/bench/verilog/
18	Updated timing and fixed some typing errors.	lampret	8217d 16h	/gpio/tags/rel_13/bench/verilog/
13	Changed VCD output location.	lampret	8275d 02h	/gpio/tags/rel_13/bench/verilog/
12	Changed gpio top level into gpio_top. Changed defines.v into gpio_defines.v.	lampret	8275d 03h	/gpio/tags/rel_13/bench/verilog/
11	More intensive verification.	lampret	8302d 20h	/gpio/tags/rel_13/bench/verilog/
8	Changed directory structure, port names and drfines.	lampret	8302d 21h	/gpio/tags/rel_13/bench/verilog/