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[/] [gpio/] [tags/] [rel_2/] [rtl/] [verilog/] - Rev 65

Rev	Log message	Author	Age	Path
65	New directory structure.	root	5549d 20h	/gpio/tags/rel_2/rtl/verilog/
30	This commit was manufactured by cvs2svn to create tag 'rel_2'.		7859d 21h	/gpio/tags/rel_2/rtl/verilog/
29	Added ifdef to remove mux from clk_pad_i if mux is not allowed. This also removes RGPIO_CTRL[NEC].	lampret	7859d 21h	/gpio/tags/rel_2/rtl/verilog/
27	negedge flops are enabled by default.	lampret	8049d 00h	/gpio/tags/rel_2/rtl/verilog/
26	Removed zero padding as per Avi Shamli suggestion.	lampret	8102d 21h	/gpio/tags/rel_2/rtl/verilog/
25	Ports changed per Ran Aviram suggestions.	lampret	8102d 22h	/gpio/tags/rel_2/rtl/verilog/
24	Interrupt is asserted only when an input changes (code patch by Jacob Gorban)	lampret	8107d 15h	/gpio/tags/rel_2/rtl/verilog/
23	Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification.	lampret	8160d 23h	/gpio/tags/rel_2/rtl/verilog/
22	Fixed two typos.	lampret	8181d 01h	/gpio/tags/rel_2/rtl/verilog/
21	Added RGPIO_INTS.	lampret	8181d 01h	/gpio/tags/rel_2/rtl/verilog/
20	Fixing style.	lampret	8193d 22h	/gpio/tags/rel_2/rtl/verilog/
19	Fixed bug when wb_inta_o is registered (GPIO_WB_REGISTERED_OUTPUTS)	lampret	8194d 11h	/gpio/tags/rel_2/rtl/verilog/
17	Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS.	lampret	8221d 16h	/gpio/tags/rel_2/rtl/verilog/
15	Fixed wb_err_o.	lampret	8236d 16h	/gpio/tags/rel_2/rtl/verilog/
14	Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v.	lampret	8279d 00h	/gpio/tags/rel_2/rtl/verilog/