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[/] [ha1588/] [trunk/] - Rev 75

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Rev Log message Author Age Path
75 Added empty folder sys/xilinx_ipi. ash_riple 2391d 08h /ha1588/trunk/
74 Changed the name of system integration folders, going to add xilinx IPI support for Vivado. ash_riple 2391d 08h /ha1588/trunk/
73 Corrected AXI4 wrapper timing bug.
Added system-level instantiation examples for XPS and Qsys.		 ash_riple 3637d 12h /ha1588/trunk/
72 Minor changes. ash_riple 3963d 08h /ha1588/trunk/
71 Added architecture description in the doc folder. ash_riple 3963d 10h /ha1588/trunk/
70 Updated Altera Qsys instantiation script. ash_riple 4119d 07h /ha1588/trunk/
69 Fixed the negative period adjustment bug. ash_riple 4120d 12h /ha1588/trunk/
68 Refined the vendor specific IP instanttiation. Now DCFIFO is instantiated as a vendor specific IP in PAR directory. ash_riple 4120d 15h /ha1588/trunk/
67 Updated the WishBone IP top and Qsys IP top. ash_riple 4122d 08h /ha1588/trunk/
66 Added IP instantiation support for: QSys, XPS and WishBone. ash_riple 4123d 08h /ha1588/trunk/
65 Added WishBone compatible wrapper for register access. ash_riple 4127d 12h /ha1588/trunk/
64 Added PTPv2 timing analyzer tool. ash_riple 4129d 09h /ha1588/trunk/
63 Updated the simulation script under Linux. ash_riple 4132d 13h /ha1588/trunk/
62 Removed environment variable settings in the simulation script under Windows. ash_riple 4132d 13h /ha1588/trunk/
61 Made different scripts for top-level simulation to run under Linux. ash_riple 4132d 14h /ha1588/trunk/
60 Made different scripts for top-level simulation to run under Linux. ash_riple 4132d 14h /ha1588/trunk/
59 Made different scripts for top-level simulation to run under Windows. ash_riple 4132d 14h /ha1588/trunk/
58 Added output rtc_time_one_pps for clock accuracy measurement. 1PPS output is leading edge aligned with the PTP time output on boundary of 1s. edn_walter 4405d 11h /ha1588/trunk/
57 Added parameters of frame header constants for packet parsing. edn_walter 4405d 12h /ha1588/trunk/
56 Added parameter of VLAN TPID for stacked VLAN parsing. edn_walter 4405d 13h /ha1588/trunk/
55 Updated the SOPC Builder example with GMII/MII support. edn_walter 4406d 09h /ha1588/trunk/
54 Added support for MII interface as well as GMII interface. Updated unit and top-level test cases. edn_walter 4406d 10h /ha1588/trunk/
52 1. Corrected GMII BFM preamble+sfd size error: 4B 5555555d changed to 8B 5555555555555555d5.
2. Corrected packet parser 4B counter accordingly.		 edn_walter 4408d 08h /ha1588/trunk/
51 Making test case pass for SOPC simulation. edn_walter 4412d 18h /ha1588/trunk/
50 Added missing simulation library. edn_walter 4412d 19h /ha1588/trunk/
49 Added missing simulation library. edn_walter 4413d 03h /ha1588/trunk/
48 1. Added testbench for SOPC Builder example. Need to fully implement the self-check test cases. Just ignore the reported failures, and check the waveform for correct addressing.
2. Added GENERATE BLOCK for top-level addr_in unit selection. In normal top-level instantiation without modify the default addr_is_in_word = 0 parameter, the default address unit is in byte (8bit); When instantiated in SOPC Builder, the address unit is default to word (32bit).		 edn_walter 4413d 08h /ha1588/trunk/
47 Added test case of -16 negative period_adj value, to show the effect trying to set time backwards. Thanks to Frank Yang's question. edn_walter 4413d 18h /ha1588/trunk/
46 Added operation details to the memory map doc. Memory map should be interpreted with help of ptp_drv_bfm.c. edn_walter 4416d 10h /ha1588/trunk/
45 1. optimized area, by removing unused registers.
2. optimized timing, by removing latches.		 edn_walter 4417d 01h /ha1588/trunk/

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