URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 13

Rev	Log message	Author	Age	Path
13	Fixed some synthesis warnings.	rherveille	8229d 07h	/
12	no message	rherveille	8234d 22h	/
11	Changed RST_LVL define to parameter.	rherveille	8238d 06h	/
10	Created new directory structure. Added Verilog version.	rherveille	8260d 02h	/
9	Created directory structure (documentation, vhdl, verilog)	rherveille	8329d 21h	/
8	Created directory structure (documentation, vhdl, verilog)	rherveille	8329d 21h	/
7	added some remarks, fixed some sensitivity lists	rherveille	8399d 00h	/
6	fixed typo txt -> txr	rherveille	8403d 04h	/
5	fixed an incomplete sensitivity list on assign_dato process	rherveille	8410d 02h	/
4	WISHBONE I2C Master Core: initial release	rherveille	8462d 05h	/
3	This commit was manufactured by cvs2svn to create tag 'first'.		8524d 04h	/
2	initial release	rherveille	8524d 04h	/
1	Standard project directories initialized by cvs2svn.		8524d 04h	/