URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 33

Rev	Log message	Author	Age	Path
13	Fixed some synthesis warnings.	rherveille	8240d 20h	/
12	no message	rherveille	8246d 11h	/
11	Changed RST_LVL define to parameter.	rherveille	8249d 19h	/
10	Created new directory structure. Added Verilog version.	rherveille	8271d 15h	/
9	Created directory structure (documentation, vhdl, verilog)	rherveille	8341d 10h	/
8	Created directory structure (documentation, vhdl, verilog)	rherveille	8341d 10h	/
7	added some remarks, fixed some sensitivity lists	rherveille	8410d 13h	/
6	fixed typo txt -> txr	rherveille	8414d 17h	/
5	fixed an incomplete sensitivity list on assign_dato process	rherveille	8421d 15h	/
4	WISHBONE I2C Master Core: initial release	rherveille	8473d 18h	/