OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [tags/] [rel_1/] - Rev 22

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
22 Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment. rherveille 7996d 10h /i2c/tags/rel_1/
21 no message rherveille 8082d 11h /i2c/tags/rel_1/
20 Added Appendix A rherveille 8082d 11h /i2c/tags/rel_1/
19 Fixed some race conditions in the i2c-slave model.
Added debug information.
Added headers.		 rherveille 8086d 07h /i2c/tags/rel_1/
18 no message rherveille 8113d 03h /i2c/tags/rel_1/
17 C-include file.
Initial release		 rherveille 8201d 08h /i2c/tags/rel_1/
16 Changed PRER reset value from 0x0000 to 0xffff, conform specs. rherveille 8213d 07h /i2c/tags/rel_1/
15 Split i2c_master_core.vhd into separate files for each entity; same layout as verilog version.
Code updated, is now up-to-date to doc. rev.0.4.
Added headers.		 rherveille 8218d 06h /i2c/tags/rel_1/
14 Fixed wb_ack_o generation bug.
Fixed bug in the byte_controller statemachine.
Added headers.		 rherveille 8218d 06h /i2c/tags/rel_1/
13 Fixed some synthesis warnings. rherveille 8229d 10h /i2c/tags/rel_1/
12 no message rherveille 8235d 02h /i2c/tags/rel_1/
11 Changed RST_LVL define to parameter. rherveille 8238d 09h /i2c/tags/rel_1/
10 Created new directory structure.
Added Verilog version.		 rherveille 8260d 06h /i2c/tags/rel_1/
9 Created directory structure (documentation, vhdl, verilog) rherveille 8330d 01h /i2c/tags/rel_1/
8 Created directory structure (documentation, vhdl, verilog) rherveille 8330d 01h /i2c/tags/rel_1/
7 added some remarks, fixed some sensitivity lists rherveille 8399d 03h /i2c/tags/rel_1/
6 fixed typo txt -> txr rherveille 8403d 07h /i2c/tags/rel_1/
5 fixed an incomplete sensitivity list on assign_dato process rherveille 8410d 05h /i2c/tags/rel_1/
4 WISHBONE I2C Master Core: initial release rherveille 8462d 08h /i2c/tags/rel_1/
2 initial release rherveille 8524d 08h /i2c/tags/rel_1/
1 Standard project directories initialized by cvs2svn. 8524d 08h /i2c/tags/rel_1/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.