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[/] [i2c/] [tags/] [rel_1/] [sim/] [i2c_verilog/] - Rev 69

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Rev Log message Author Age Path
68 New directory structure. root 5528d 15h /i2c/tags/rel_1/sim/i2c_verilog/
44 This commit was manufactured by cvs2svn to create tag 'rel_1'. 7535d 05h /i2c/tags/rel_1/sim/i2c_verilog/
22 Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment. rherveille 7988d 06h /i2c/tags/rel_1/sim/i2c_verilog/

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