OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 11

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
11 Changed RST_LVL define to parameter. rherveille 8228d 10h /i2c/trunk/
10 Created new directory structure.
Added Verilog version.
rherveille 8250d 07h /i2c/trunk/
9 Created directory structure (documentation, vhdl, verilog) rherveille 8320d 02h /i2c/trunk/
8 Created directory structure (documentation, vhdl, verilog) rherveille 8320d 02h /i2c/trunk/
7 added some remarks, fixed some sensitivity lists rherveille 8389d 05h /i2c/trunk/
6 fixed typo txt -> txr rherveille 8393d 08h /i2c/trunk/
5 fixed an incomplete sensitivity list on assign_dato process rherveille 8400d 07h /i2c/trunk/
4 WISHBONE I2C Master Core: initial release rherveille 8452d 10h /i2c/trunk/
2 initial release rherveille 8514d 09h /i2c/trunk/
1 Standard project directories initialized by cvs2svn. 8514d 09h /i2c/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.