URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 32

Rev	Log message	Author	Age	Path
12	no message	rherveille	8238d 05h	/i2c/trunk/
11	Changed RST_LVL define to parameter.	rherveille	8241d 12h	/i2c/trunk/
10	Created new directory structure. Added Verilog version.	rherveille	8263d 09h	/i2c/trunk/
9	Created directory structure (documentation, vhdl, verilog)	rherveille	8333d 04h	/i2c/trunk/
8	Created directory structure (documentation, vhdl, verilog)	rherveille	8333d 04h	/i2c/trunk/
7	added some remarks, fixed some sensitivity lists	rherveille	8402d 07h	/i2c/trunk/
6	fixed typo txt -> txr	rherveille	8406d 10h	/i2c/trunk/
5	fixed an incomplete sensitivity list on assign_dato process	rherveille	8413d 08h	/i2c/trunk/
4	WISHBONE I2C Master Core: initial release	rherveille	8465d 12h	/i2c/trunk/
2	initial release	rherveille	8527d 11h	/i2c/trunk/