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[/] [i2c/] [trunk/] - Rev 48

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48 Fixed a bug in the arbitration-lost signal generation. VHDL version only. rherveille 7369d 19h /i2c/trunk
47 Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command. rherveille 7378d 15h /i2c/trunk
46 Fixed slave address MSB='1' bug rherveille 7453d 15h /i2c/trunk
45 Added slave address configurability rherveille 7453d 15h /i2c/trunk
43 Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'. rherveille 7538d 18h /i2c/trunk
40 Fix a blocking vs. non-blocking error in the wb_dat output mux. rherveille 7548d 16h /i2c/trunk
39 Forgot an 'end if' :-/ rherveille 7568d 12h /i2c/trunk
38 Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line.
Fixed a potential bug in the byte controller's host-acknowledge generation.		 rherveille 7571d 19h /i2c/trunk
37 Fixed a type in example 1
Changed 'RW' to 'W' in command register description.
Changed 'RW' to 'W' in transmit register description.		 rherveille 7608d 11h /i2c/trunk
36 Fixed cmd_ack generation item (no bug). rherveille 7723d 12h /i2c/trunk
35 Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles. rherveille 7757d 02h /i2c/trunk
34 Fixed a few 'arbitration lost' bugs. VHDL version only. rherveille 7761d 00h /i2c/trunk
33 Fixed a bug in the Command Register declaration. rherveille 7783d 10h /i2c/trunk
32 Multi-master capabilities added to the core. Changed documentation accordingly.
Updated some timing diagrams.		 rherveille 7793d 09h /i2c/trunk
31 Core is now a Multimaster I2C controller. rherveille 7797d 10h /i2c/trunk
30 Small code simplifications rherveille 7797d 10h /i2c/trunk
29 Core is now a Multimaster I2C controller rherveille 7797d 11h /i2c/trunk
28 *** empty log message *** rherveille 7823d 04h /i2c/trunk
27 Cleaned up code rherveille 7823d 04h /i2c/trunk
26 *** empty log message *** rherveille 7826d 12h /i2c/trunk

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