OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 55

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
55 Fixed register overwrite issue.
Removed full_case pragma, replaced it by a default statement.		 rherveille 7009d 18h /i2c/trunk/
54 Fixed scl, sda delay. rherveille 7009d 18h /i2c/trunk/
53 Fixed previous fix :) Made a variable vs signal mistake. rherveille 7305d 16h /i2c/trunk/
52 Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit. rherveille 7305d 17h /i2c/trunk/
51 Fixed simulation issue when writing to CR register rherveille 7359d 17h /i2c/trunk/
50 *** empty log message *** rherveille 7374d 12h /i2c/trunk/
49 Added testbench rherveille 7374d 12h /i2c/trunk/
48 Fixed a bug in the arbitration-lost signal generation. VHDL version only. rherveille 7375d 20h /i2c/trunk/
47 Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command. rherveille 7384d 16h /i2c/trunk/
46 Fixed slave address MSB='1' bug rherveille 7459d 17h /i2c/trunk/
45 Added slave address configurability rherveille 7459d 17h /i2c/trunk/
43 Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'. rherveille 7544d 19h /i2c/trunk/
40 Fix a blocking vs. non-blocking error in the wb_dat output mux. rherveille 7554d 17h /i2c/trunk/
39 Forgot an 'end if' :-/ rherveille 7574d 13h /i2c/trunk/
38 Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line.
Fixed a potential bug in the byte controller's host-acknowledge generation.		 rherveille 7577d 21h /i2c/trunk/
37 Fixed a type in example 1
Changed 'RW' to 'W' in command register description.
Changed 'RW' to 'W' in transmit register description.		 rherveille 7614d 12h /i2c/trunk/
36 Fixed cmd_ack generation item (no bug). rherveille 7729d 13h /i2c/trunk/
35 Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles. rherveille 7763d 04h /i2c/trunk/
34 Fixed a few 'arbitration lost' bugs. VHDL version only. rherveille 7767d 02h /i2c/trunk/
33 Fixed a bug in the Command Register declaration. rherveille 7789d 11h /i2c/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.