OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] [rtl/] - Rev 68

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
68 New directory structure. root 5534d 21h /i2c/trunk/rtl
67 Fixed slave_wait clocked event syntax rherveille 5567d 23h /trunk/rtl
66 Fixed type iscl_oen instead of scl_oen rherveille 5582d 23h /trunk/rtl
65 Changed wb_adr_i from unsigned to std_logic_vector rherveille 5583d 09h /trunk/rtl
64 Added SCL clock synchronization logic
Fixed slave_wait signal generation
rherveille 5583d 09h /trunk/rtl
63 Added clock synchronization logic
Fixed slave_wait signal
rherveille 5583d 09h /trunk/rtl
62 Fixed synopsys miss spell (synopsis)
Fixed cr[0] register width
Fixed ! usage instead of ~
Fixed bit controller parameter width to 18bits
rherveille 5583d 23h /trunk/rtl
60 Added missing semicolons ';' on endif rherveille 6415d 07h /trunk/rtl
59 fixed short scl high pulse after clock stretch rherveille 6420d 09h /trunk/rtl
57 fixed short scl high pulse after clock stretch
fixed slave model not returning correct '(n)ack' signal
rherveille 6452d 10h /trunk/rtl
55 Fixed register overwrite issue.
Removed full_case pragma, replaced it by a default statement.
rherveille 7006d 10h /trunk/rtl
53 Fixed previous fix :) Made a variable vs signal mistake. rherveille 7302d 08h /trunk/rtl
52 Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit. rherveille 7302d 08h /trunk/rtl
51 Fixed simulation issue when writing to CR register rherveille 7356d 09h /trunk/rtl
48 Fixed a bug in the arbitration-lost signal generation. VHDL version only. rherveille 7372d 12h /trunk/rtl
47 Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command. rherveille 7381d 08h /trunk/rtl
40 Fix a blocking vs. non-blocking error in the wb_dat output mux. rherveille 7551d 09h /trunk/rtl
39 Forgot an 'end if' :-/ rherveille 7571d 05h /trunk/rtl
38 Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line.
Fixed a potential bug in the byte controller's host-acknowledge generation.
rherveille 7574d 13h /trunk/rtl
36 Fixed cmd_ack generation item (no bug). rherveille 7726d 05h /trunk/rtl

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.