OpenCores
URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] [rtl/] [verilog/] - Rev 16

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
16 Changed PRER reset value from 0x0000 to 0xffff, conform specs. rherveille 8210d 21h /i2c/trunk/rtl/verilog/
14 Fixed wb_ack_o generation bug.
Fixed bug in the byte_controller statemachine.
Added headers.
rherveille 8215d 20h /i2c/trunk/rtl/verilog/
13 Fixed some synthesis warnings. rherveille 8227d 00h /i2c/trunk/rtl/verilog/
11 Changed RST_LVL define to parameter. rherveille 8235d 23h /i2c/trunk/rtl/verilog/
10 Created new directory structure.
Added Verilog version.
rherveille 8257d 20h /i2c/trunk/rtl/verilog/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.