URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] [rtl/] [verilog/] [i2c_master_byte_ctrl.v] - Rev 38

Rev	Log message	Author	Age	Path
38	Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line. Fixed a potential bug in the byte controller's host-acknowledge generation.	rherveille	7579d 17h	/i2c/trunk/rtl/verilog/i2c_master_byte_ctrl.v
29	Core is now a Multimaster I2C controller	rherveille	7805d 09h	/i2c/trunk/rtl/verilog/i2c_master_byte_ctrl.v
27	Cleaned up code	rherveille	7831d 02h	/i2c/trunk/rtl/verilog/i2c_master_byte_ctrl.v
14	Fixed wb_ack_o generation bug. Fixed bug in the byte_controller statemachine. Added headers.	rherveille	8221d 12h	/i2c/trunk/rtl/verilog/i2c_master_byte_ctrl.v
13	Fixed some synthesis warnings.	rherveille	8232d 16h	/i2c/trunk/rtl/verilog/i2c_master_byte_ctrl.v
10	Created new directory structure. Added Verilog version.	rherveille	8263d 12h	/i2c/trunk/rtl/verilog/i2c_master_byte_ctrl.v