URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk] - Rev 73

Rev	Log message	Author	Age	Path
51	Fixed simulation issue when writing to CR register	rherveille	7371d 15h	/i2c/trunk
50	* empty log message *	rherveille	7386d 10h	/i2c/trunk
49	Added testbench	rherveille	7386d 10h	/i2c/trunk
48	Fixed a bug in the arbitration-lost signal generation. VHDL version only.	rherveille	7387d 18h	/i2c/trunk
47	Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command.	rherveille	7396d 14h	/i2c/trunk
46	Fixed slave address MSB='1' bug	rherveille	7471d 15h	/i2c/trunk
45	Added slave address configurability	rherveille	7471d 15h	/i2c/trunk
43	Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'.	rherveille	7556d 17h	/i2c/trunk
40	Fix a blocking vs. non-blocking error in the wb_dat output mux.	rherveille	7566d 15h	/i2c/trunk
39	Forgot an 'end if' :-/	rherveille	7586d 11h	/i2c/trunk