URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk] - Rev 76

Rev	Log message	Author	Age	Path
54	Fixed scl, sda delay.	rherveille	7004d 08h	/i2c/trunk
53	Fixed previous fix :) Made a variable vs signal mistake.	rherveille	7300d 06h	/i2c/trunk
52	Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit.	rherveille	7300d 07h	/i2c/trunk
51	Fixed simulation issue when writing to CR register	rherveille	7354d 07h	/i2c/trunk
50	* empty log message *	rherveille	7369d 02h	/i2c/trunk
49	Added testbench	rherveille	7369d 02h	/i2c/trunk
48	Fixed a bug in the arbitration-lost signal generation. VHDL version only.	rherveille	7370d 10h	/i2c/trunk
47	Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command.	rherveille	7379d 06h	/i2c/trunk
46	Fixed slave address MSB='1' bug	rherveille	7454d 07h	/i2c/trunk
45	Added slave address configurability	rherveille	7454d 07h	/i2c/trunk