URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 36

Rev	Log message	Author	Age	Path
36	Fixed cmd_ack generation item (no bug).	rherveille	7726d 19h	/
35	Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles.	rherveille	7760d 10h	/
34	Fixed a few 'arbitration lost' bugs. VHDL version only.	rherveille	7764d 08h	/
33	Fixed a bug in the Command Register declaration.	rherveille	7786d 17h	/
32	Multi-master capabilities added to the core. Changed documentation accordingly. Updated some timing diagrams.	rherveille	7796d 16h	/
31	Core is now a Multimaster I2C controller.	rherveille	7800d 18h	/
30	Small code simplifications	rherveille	7800d 18h	/
29	Core is now a Multimaster I2C controller	rherveille	7800d 19h	/
28	* empty log message *	rherveille	7826d 11h	/
27	Cleaned up code	rherveille	7826d 11h	/
26	* empty log message *	rherveille	7829d 19h	/
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7857d 15h	/
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7857d 15h	/
23	* empty log message *	rherveille	7984d 21h	/
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	7995d 02h	/
21	no message	rherveille	8081d 03h	/
20	Added Appendix A	rherveille	8081d 03h	/
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8084d 23h	/
18	no message	rherveille	8111d 19h	/
17	C-include file. Initial release	rherveille	8200d 00h	/