OpenCores
URL https://opencores.org/ocsvn/light52/light52/trunk

Subversion Repositories light52

[/] [light52/] [trunk/] - Rev 26

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
26 Changed the VHDL simulation logging code to match the SW simulator.
The JBC ACC.x instruction is a special case that needs a tiny hack...
Note this affects only the simulation test bench, not the RTL!
ja_rd 3800d 21h /light52/trunk/
25 Pre-generated object code packages updated with new test bench. ja_rd 3800d 21h /light52/trunk/
24 Basic CPU test bench modified to catch previously undetected bug in CLR BIT. Still too weak though... ja_rd 3800d 21h /light52/trunk/
23 Fixed CLR.bit when ACC was the target.
Implemented solution suggested by Stephane Bouyat, worked like a charm!
ja_rd 3800d 21h /light52/trunk/
22 Fixed comments in object code package generation script.
The comments were awfully wrong -- leftover from another project, actually.
ja_rd 4092d 00h /light52/trunk/
21 ja_rd 4107d 05h /light52/trunk/
20 ja_rd 4107d 05h /light52/trunk/
19 Refactor: interrupts made 100% compatible to original:
IRQ priority logic implemented as in original MCS51.
Register IP implemented.
Interrupt mini-testbench code updated accordingly.
ja_rd 4107d 05h /light52/trunk/
18 Refactor: interrupts made 100% compatible to original:
IRQ priority logic implemented as in original MCS51.
Register IP implemented.
Interrupt mini-testbench code updated accordingly.
ja_rd 4107d 05h /light52/trunk/
17 Refactor: interrupts made 100% compatible to original:
IRQ priority logic implemented as in original MCS51.
Register IP implemented.
Interrupt mini-testbench code updated accordingly.
ja_rd 4107d 05h /light52/trunk/
16 Test bench modified: now tests IRAM and SFR addresses when testing direct mode instructions (instead of only IRAM). ja_rd 4109d 01h /light52/trunk/
15 Test bench modified: now tests IRAM and SFR addresses when testing direct mode instructions (instead of only IRAM). ja_rd 4112d 23h /light52/trunk/
14 BUG FIX: <DJNZ dir, rel> didn't work when addressing an SFR.
Signal direct_addressing fixed.
ja_rd 4113d 04h /light52/trunk/
13 BUG FIX: <DJNZ dir, rel> was tested only with IRAM addresses.
Now it's tested with an SFR too.
The test package has been fixed too with a XRAM configuration suitable for the test bench (it was zero).
ja_rd 4113d 04h /light52/trunk/
12 BUG FIX: The build script did not configure XDATA space properly.
XDATA size was zero, which made the HW tests fail.
ja_rd 4113d 07h /light52/trunk/
11 Removed old 'demos' directory. These files are now in the 'boards' directory. ja_rd 4175d 06h /light52/trunk/
10 Updated 'quickstart' to reflect new organization of demo directory. ja_rd 4175d 06h /light52/trunk/
9 Fixed quartus-2 project file -- replaced absolute output path with relative path. ja_rd 4175d 07h /light52/trunk/
8 Added support to build demos on another board: Avnet's Spartan-3A Evaluation Board. ja_rd 4177d 23h /light52/trunk/
7 Removed obsolete comment from core include file. ja_rd 4177d 23h /light52/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.