URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

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Rev	Log message	Author	Age	Path
26	Builds test bench from vhdl template and assembly source relies on TASM to do the assembly	ja_rd	5553d 10h	/
25	Moved from /util Added comments and generally improved options	ja_rd	5553d 10h	/
24	Totally changed -- tests interrupts using simulated interrupt controller in hdl test bench Code reformatted for TASM	ja_rd	5553d 10h	/
23	Code reformatted for TASM	ja_rd	5553d 10h	/
22	Totally changed -- vhdl code generated from a template Interrupts tested from software using a simulated interrupt controller	ja_rd	5553d 10h	/
21	Totally changed -- vhdl code generated from a template	ja_rd	5553d 10h	/
20	VHDL template for test benches	ja_rd	5553d 10h	/
19	Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances) Added an output to the core to mark the fetch cycle of all instructions Started to add timing diagrams	ja_rd	5553d 10h	/
18	Uncluttered the signal display a bit	ja_rd	5553d 10h	/
17	Comments added	ja_rd	5639d 13h	/
16	adding LST filed generated by TASM	ja_rd	5639d 13h	/
15	Names and contents of some files changed	ja_rd	5639d 13h	/
14	Syntax changed from CP/M ASM to DOS TASM Success code changed	ja_rd	5639d 13h	/
13	Minor changes in embedded code changed (success code now stands out better visually) Comments added explaining the TB mechanincs	ja_rd	5639d 13h	/
12	Minor changes in embedded code changed (success code now stands out better visually)	ja_rd	5639d 13h	/
11	typos fixed	ja_rd	5639d 13h	/
10	minor edits, comments clarified	ja_rd	5667d 03h	/
9	Design notes now done with LaTeX, OpenOffice source removed	ja_rd	5672d 10h	/
8	LaTeX source for the design notes	ja_rd	5672d 10h	/
7	Minor edits and clarifications, plus document is now generated with LaTeX instead of OpenOffice	ja_rd	5672d 10h	/

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Subversion Repositories light8080

[/] - Rev 26

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