URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] - Rev 63

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Rev	Log message	Author	Age	Path
63	Modified syntax of ARGV parameter for compatibility to later versions of Perl	ja_rd	4478d 14h	/light8080/
62	Changed all hard tabs to spaces as preamble to a minor refactor	ja_rd	4479d 00h	/light8080/
61	Basic demo updated: main entity name changed to keep synthesis too happy	ja_rd	4847d 01h	/light8080/
60	Fixed nasty typo in pin constraints file (clock input)	ja_rd	4851d 07h	/light8080/
59	tabs to spaces	ja_rd	4875d 14h	/light8080/
58	tabs to spaces	ja_rd	4875d 14h	/light8080/
57	removed unfinished CPM demo files	ja_rd	5060d 04h	/light8080/
56	file list updated	ja_rd	5060d 04h	/light8080/
55	Altair 4K Basic demo on DE-1 board	ja_rd	5060d 04h	/light8080/
54	BUG FIX: XOR operations wre not clearing CY and ACY	ja_rd	5060d 04h	/light8080/
53	added interrupt for single-stepping cleaned up comments a bit	ja_rd	5416d 04h	/light8080/
52	test bench compilation script sanitized a little	ja_rd	5416d 04h	/light8080/
51	interrupt test bench adapted to the fix in IE instruction	ja_rd	5416d 04h	/light8080/
50	interrupt test bench adapted to the fix in IE instruction	ja_rd	5416d 04h	/light8080/
49	fixed: IE now enables interrupts after a 1-instruction delay (it was enabling interrupts immediately)	ja_rd	5416d 04h	/light8080/
48	clarification of some terms in the comments	ja_rd	5416d 20h	/light8080/
47	edited the file list and added a few remarks	ja_rd	5416d 20h	/light8080/
46	minor change in signal color for better readability	ja_rd	5416d 20h	/light8080/
45	Added modelsim scripts for the test benches	ja_rd	5416d 20h	/light8080/
44	fixed error in RST test, added support for long intr tests added a test of a 'long' intr pulse	ja_rd	5416d 20h	/light8080/

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Subversion Repositories light8080

[/] [light8080/] - Rev 63

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