URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [vhdl/] - Rev 58

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Rev	Log message	Author	Age	Path
57	removed unfinished CPM demo files	ja_rd	5062d 15h	/light8080/trunk/vhdl/
55	Altair 4K Basic demo on DE-1 board	ja_rd	5062d 15h	/light8080/trunk/vhdl/
54	BUG FIX: XOR operations wre not clearing CY and ACY	ja_rd	5062d 15h	/light8080/trunk/vhdl/
53	added interrupt for single-stepping cleaned up comments a bit	ja_rd	5418d 15h	/light8080/trunk/vhdl/
50	interrupt test bench adapted to the fix in IE instruction	ja_rd	5418d 15h	/light8080/trunk/vhdl/
49	fixed: IE now enables interrupts after a 1-instruction delay (it was enabling interrupts immediately)	ja_rd	5418d 15h	/light8080/trunk/vhdl/
42	test bench 1 regenerated with new template added a test for 'long' intr pulses	ja_rd	5419d 08h	/light8080/trunk/vhdl/
41	test bench 0 regenerated with new template no changes to the test code	ja_rd	5419d 08h	/light8080/trunk/vhdl/
40	test bench template now can simulate intr pulses longer than 1 cycle	ja_rd	5419d 08h	/light8080/trunk/vhdl/
39	fixed: int request (intr) can now be wider than 1 cycle	ja_rd	5419d 08h	/light8080/trunk/vhdl/
38	pin assignment for IMSAI demo removed	ja_rd	5419d 08h	/light8080/trunk/vhdl/
37	IMSAI monitor demo removed	ja_rd	5419d 08h	/light8080/trunk/vhdl/
36	CPM demo on cyclone 2 starter board (work in progress)	ja_rd	5419d 08h	/light8080/trunk/vhdl/
35	CPM demo pin assignment file (Altera Quartus II)	ja_rd	5419d 08h	/light8080/trunk/vhdl/
34	rs232 sanitized and parametrized	ja_rd	5419d 08h	/light8080/trunk/vhdl/
31	New directory structure.	root	5550d 11h	/light8080/trunk/vhdl/
22	Totally changed -- vhdl code generated from a template Interrupts tested from software using a simulated interrupt controller	ja_rd	5570d 17h	/trunk/vhdl/
21	Totally changed -- vhdl code generated from a template	ja_rd	5570d 17h	/trunk/vhdl/
20	VHDL template for test benches	ja_rd	5570d 17h	/trunk/vhdl/
19	Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances) Added an output to the core to mark the fetch cycle of all instructions Started to add timing diagrams	ja_rd	5570d 17h	/trunk/vhdl/

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Subversion Repositories light8080

[/] [light8080/] [trunk/] [vhdl/] - Rev 58

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