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[/] [light8080/] [trunk/] [vhdl/] - Rev 73

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Rev Log message Author Age Path
70 Added new VHDL SoC for demonstration purposes ja_rd 4416d 01h /light8080/trunk/vhdl/
64 BUG FIX: Flags CY and AC were not clear by logic instructions
Added new flag to microcode: clr_acy
Used new flag to clear AC and CY flags unconditonally
Modified microcode for XR*, OR* and AN* to use new flag
Modified microcode assembler to support new flag
Addex explaination of new flag to documentation
Old fix that worked only for XR* instructions removed
Test bench tb0 modified to test CY clearance minimally (AC untested!)
Pre-generated vhel test bench tb0 altered accordingly
ja_rd 4463d 05h /light8080/trunk/vhdl/
61 Basic demo updated: main entity name changed to keep synthesis too happy ja_rd 4831d 15h /light8080/trunk/vhdl/
60 Fixed nasty typo in pin constraints file (clock input) ja_rd 4835d 21h /light8080/trunk/vhdl/
59 tabs to spaces ja_rd 4860d 04h /light8080/trunk/vhdl/
57 removed unfinished CPM demo files ja_rd 5044d 18h /light8080/trunk/vhdl/
55 Altair 4K Basic demo on DE-1 board ja_rd 5044d 18h /light8080/trunk/vhdl/
54 BUG FIX: XOR operations wre not clearing CY and ACY ja_rd 5044d 18h /light8080/trunk/vhdl/
53 added interrupt for single-stepping
cleaned up comments a bit
ja_rd 5400d 18h /light8080/trunk/vhdl/
50 interrupt test bench adapted to the fix in IE instruction ja_rd 5400d 18h /light8080/trunk/vhdl/
49 fixed: IE now enables interrupts after a 1-instruction delay
(it was enabling interrupts immediately)
ja_rd 5400d 18h /light8080/trunk/vhdl/
42 test bench 1 regenerated with new template
added a test for 'long' intr pulses
ja_rd 5401d 11h /light8080/trunk/vhdl/
41 test bench 0 regenerated with new template
no changes to the test code
ja_rd 5401d 11h /light8080/trunk/vhdl/
40 test bench template now can simulate intr pulses longer than 1 cycle ja_rd 5401d 11h /light8080/trunk/vhdl/
39 fixed: int request (intr) can now be wider than 1 cycle ja_rd 5401d 11h /light8080/trunk/vhdl/
38 pin assignment for IMSAI demo removed ja_rd 5401d 11h /light8080/trunk/vhdl/
37 IMSAI monitor demo removed ja_rd 5401d 11h /light8080/trunk/vhdl/
36 CPM demo on cyclone 2 starter board
(work in progress)
ja_rd 5401d 11h /light8080/trunk/vhdl/
35 CPM demo pin assignment file (Altera Quartus II) ja_rd 5401d 11h /light8080/trunk/vhdl/
34 rs232 sanitized and parametrized ja_rd 5401d 11h /light8080/trunk/vhdl/

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