OpenCores
URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [vhdl/] [light8080.vhdl] - Rev 64

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
64 BUG FIX: Flags CY and AC were not clear by logic instructions
Added new flag to microcode: clr_acy
Used new flag to clear AC and CY flags unconditonally
Modified microcode for XR*, OR* and AN* to use new flag
Modified microcode assembler to support new flag
Addex explaination of new flag to documentation
Old fix that worked only for XR* instructions removed
Test bench tb0 modified to test CY clearance minimally (AC untested!)
Pre-generated vhel test bench tb0 altered accordingly		 ja_rd 4465d 11h /light8080/trunk/vhdl/light8080.vhdl
54 BUG FIX: XOR operations wre not clearing CY and ACY ja_rd 5047d 00h /light8080/trunk/vhdl/light8080.vhdl
49 fixed: IE now enables interrupts after a 1-instruction delay
(it was enabling interrupts immediately)		 ja_rd 5403d 00h /light8080/trunk/vhdl/light8080.vhdl
39 fixed: int request (intr) can now be wider than 1 cycle ja_rd 5403d 17h /light8080/trunk/vhdl/light8080.vhdl
31 New directory structure. root 5534d 20h /light8080/trunk/vhdl/light8080.vhdl
19 Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances)
Added an output to the core to mark the fetch cycle of all instructions
Started to add timing diagrams		 ja_rd 5555d 02h /light8080/trunk/vhdl/light8080.vhdl
10 minor edits, comments clarified ja_rd 5668d 19h /light8080/trunk/vhdl/light8080.vhdl
6 microcode bug in INR M, #setacy flag missing ja_rd 5738d 05h /light8080/trunk/vhdl/light8080.vhdl
4 light8080.vhdl

comments in header corrected (they were obsolete)		 ja_rd 6017d 08h /light8080/trunk/vhdl/light8080.vhdl
3 added author line and license file ja_rd 6023d 23h /light8080/trunk/vhdl/light8080.vhdl
2 initial commit ja_rd 6025d 10h /light8080/trunk/vhdl/light8080.vhdl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.