URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] [m1_core/] [trunk/] [hdl/] [rtl/] [m1_core/] [m1_cpu.v] - Rev 64

Rev	Log message	Author	Age	Path
64	Change ownership	albert.watson	2245d 04h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
61	Added branch_taken signal to correct the behavior of the unwanted double branch delay slot	fafa1971	5351d 01h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
54	New directory structure.	root	5532d 15h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
51	Finally added unaligned loads and stores.	fafa1971	5578d 21h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
50	Added handling of HALF and BYTE sizes in loads.	fafa1971	5578d 23h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
49	* empty log message *	fafa1971	5579d 00h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
48	Added proper carry generation inside ALU	fafa1971	5579d 02h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
46	Added again System Configuration Registers to properly handle exceptions.	fafa1971	5581d 05h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v
33	Added files from Mistral's new world	fafa1971	5655d 03h	/m1_core/trunk/hdl/rtl/m1_core/m1_cpu.v