URL https://opencores.org/ocsvn/minimips_superscalar/minimips_superscalar/trunk

Subversion Repositories minimips_superscalar

[/] [minimips_superscalar/] [tags/] [P0/] [bench/] [bench_minimips.vhd] - Rev 18

Rev	Log message	Author	Age	Path
18	clock_gate.vhd: removed. minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.	mcafruni	1868d 04h	/minimips_superscalar/tags/P0/bench/bench_minimips.vhd
4	It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome.	mcafruni	1959d 02h	/minimips_superscalar/tags/P0/bench/bench_minimips.vhd