Rev |
Log message |
Author |
Age |
Path |
91 |
prj/scripts/: Changing scripts not to include multiple timescale.v files from different listed directories in the project definition file. Instead, now the internal loop which look for the file in different directories is broken when the first file is found. |
rfajardo |
4614d 01h |
/ |
90 |
After minsoc_top.prj update, make regenerated src and xst files. |
rfajardo |
4614d 17h |
/ |
89 |
minsoc_top.prj was splited into minsoc_top and minsoc_bench. minsoc_top still had directory entries of bench, they are gone now. |
rfajardo |
4614d 17h |
/ |
88 |
Project structure, Xilinx Makefiles and simulation working. |
rfajardo |
4614d 17h |
/ |
87 |
Synchronizing scripts to behave exactly the same. |
rfajardo |
4614d 18h |
/ |
86 |
Updating configure script messages. |
rfajardo |
4614d 18h |
/ |
85 |
Central project definition under prj. Synthesis and simulation take their project files from here. |
rfajardo |
4614d 18h |
/ |
84 |
syn/blackboxes/eth_top.v:
-module is now called ethmac instead of eth_top
-eth_defines.v is now called ethmac_defines.v |
rfajardo |
4615d 19h |
/ |
83 |
minsoc-install.sh: bzip2 program was being used, but its existance on target system was not being verified. It is now. |
rfajardo |
4627d 00h |
/ |
82 |
minsoc-install.sh: problems with copying the GNU Toolchain from download to tools. We uncompress the GNU Toolchain now once again to tools during the installation part. |
rfajardo |
4630d 00h |
/ |
81 |
Installation script complete, nice text feedback, output logs and better execution order. |
rfajardo |
4630d 11h |
/ |
80 |
Establishing a better Makefile system for firmwares. |
rfajardo |
4632d 23h |
/ |
79 |
minsoc-install.sh: rpath corrected.
required-cygwin-tools: updated |
rfajardo |
4633d 16h |
/ |
78 |
minsoc-install.sh: Advanced JTAG bridge compilation needs to know where the dynamic libraries are on runtime. Patching (sed) the Makefile to compile it with the rpath to the libraries (libusb/libftdi). |
rfajardo |
4633d 16h |
/ |
77 |
New tool requirements for installing Icarus Verilog. |
rfajardo |
4633d 16h |
/ |
76 |
Including a script allowing the installation of MinSoC and all its required tools.
It should be working for all Linuxes and Cygwin. |
rfajardo |
4633d 16h |
/ |
75 |
Adapting minsoc_top.v and minsoc_verilog_files.txt to new names for top modules and define file of ethmac ip core. |
rfajardo |
4640d 16h |
/ |
74 |
or1200.h includes a CLABLE macro which uses __USER_LABEL_PREFIX__(from compiler defined macro) to find out if we need the underscore as prefix to reference C functions (its assembly labels) or not.
except.S and reset.S use CLABLE to call externally defined C functions.
This should avoid problems compiling firmware with old or new toolchain.
support/common.mk updated, reset-nocache.o and reset-icdc.o are dependent on or1200.h |
rfajardo |
4733d 15h |
/ |
73 |
Makefile does not automatic clean anymore. In Windows rm -f leads to errors and abort synthesis.
minsoc/syn/setup.bat added. Asks for Xilinx settings32|64.bat script and completely implements MinSoC. On completion or error, it holds window open until user input ENTER.
minsoc/sim/modelsim/: *.bat holds window open until user input ENTER.
run_sim.bat asks for target firmware, check if it exists before running simulator. Holds window open and output error message if not found. Does not hold for simulator. |
rfajardo |
4733d 20h |
/ |
72 |
Adding Windows batch files to run a Modelsim simulation.
-prepare_modelsim.bat, compile_design.bat, run_sim.bat |
rfajardo |
4733d 21h |
/ |