| Rev |
Log message |
Author |
Age |
Path |
| 175 |
Too many `endifs added to minsoc_xilinx_internal_jtag.v in revision 174. Ronan reported it and one `endif has been removed. Thanks for that Ronan. |
rfajardo |
4266d 09h |
/minsoc/ |
| 174 |
Rok Krajnc port of the Altera DE1 board with a Cyclone II. Thanks a lot! |
rfajardo |
4301d 13h |
/minsoc/ |
| 173 |
Jay Aurabind's contribution of a port to the Nexys 3 board from Digilent. Thanks!! |
rfajardo |
4301d 13h |
/minsoc/ |
| 172 |
Reverting changes to tag. Tags should never be changed. |
rfajardo |
4350d 10h |
/minsoc/ |
| 171 |
Script for Minsoc deployment |
javieralso |
4378d 16h |
/minsoc/ |
| 170 |
Changed all links to minsoc.com/dep/trunk/ to solve the issues caused by sourceforge.com. |
ConX. |
4418d 13h |
/minsoc/ |
| 169 |
Changed all links to minsoc.com/dep/v.1.0/ to solve the issues caused by sourceforge.com. |
ConX. |
4418d 13h |
/minsoc/ |
| 168 |
Installation script has an option for advanced or resumed installation.
Advanced mode:
the script only downloads and installs the required tools. Dependency libraries and tools are checked during individual tool compilation. Furthermore, the install directory is not added to the system PATH. You have to do it yourself. Libusb, libftdi and Icarus Verilog are supposed to be installed by the user.
Resumed mode:
the script checks if the dependency libraries and tools are installed before doing anything. It also adds the installation directory to the system PATH variable for bash shells on HOME/.bashrc. Libusb, libftdi and Icarus Verilog are automatically installed for you.
Non standard configuration scripts that require or1200_defines.v to be tweaked will ask before doing so and backup the correspondent files. |
rfajardo |
4602d 15h |
/minsoc/ |
| 167 |
Ruben Diez fix to installation script problem in Windows:
minsoc-install.sh breaks if there are spaces in the PATH, which is rather common under Cygwin, as most Windows PCs have something like "C:\Program Files" in there. |
rfajardo |
4636d 18h |
/minsoc/ |
| 166 |
Turning on warnings for genera_bench.
Updating minsoc-install.sh to work better with directories and working around a missing inclusion of libftdi autotools. http://opencores.org/forum,OpenRISC,0,4685,1 |
rfajardo |
4650d 18h |
/minsoc/ |
| 165 |
Board contribution: nexys2_1200 (Thanks to Johan Granath)
spartan3e_starter_kit_eth/minsoc_bench_defines.v: deprecated definition updated |
rfajardo |
4667d 19h |
/minsoc/ |
| 164 |
Updating width of minsoc_tc_top.v for Wishbone B3 compliance. This file has never worked. This solves at least the bug that some signals were not being routed through. |
rfajardo |
4732d 11h |
/minsoc/ |
| 163 |
Adjusting internal initiator array widths. They were 1 bit too large. Thanks to R. Diez report.
These arrays abstract the complete initiator inputs. This way it is easier to route and arbiter using a single input.
Also removing 2 sequential delays. I didn't design them, so I can't tell if they were really useful/good. |
rfajardo |
4738d 18h |
/minsoc/ |
| 162 |
Tasks don't have parenthesis. This is only used for ports on modules. This was a mistake from my part. |
rfajardo |
4744d 13h |
/minsoc/ |
| 161 |
Correcting configure parameters of adv_jtag_bridge on installation script. |
rfajardo |
4757d 16h |
/minsoc/ |
| 160 |
Typo in minsoc-install.sh script. Adv_jtag_bridge was not configuring correctly. |
rfajardo |
4757d 16h |
/minsoc/ |
| 159 |
Updated constraint file for de2_115 board. (Richard Hasha) |
rfajardo |
4757d 16h |
/minsoc/ |
| 158 |
Adding de2_115_board port, thanks to Richard Hasha.
Support to JSP (JTAG Serial Port) working well. Also provided by Richard Hasha.
Different interconnect configurations per board are not straightforward on MinSoC. New added modules or definitions for addresses have to be carried over to other boards. Furthermore, extra modules can be shared among all projects. Thus, it is better to have this centralized:
-Removing interconnect configuration from minsoc_defines.v. There is an interconnect_defines.v file on rtl/verilog. The software counterpart is interconnect.h on sw/drivers.
Including a jsp firmware. It is basically the uart firmware but using JSP instead. Added to all board configure scripts to be compiled on configuration.
prj/srcs extended to include jsp and interconnec_defines.v.
spartan3e_starter_kit_eth lost UART (does not fit) and uses JSP instead now. |
rfajardo |
4759d 08h |
/minsoc/ |
| 157 |
Removed obsolete file; the changes in this version have been merged into
the mainline advanced debug system version 3.0 and higher. |
nyawn |
4765d 03h |
/minsoc/ |
| 156 |
Added hardware watchpoint indicators to debug unit break input, to allow
the debugger to break when a hardware watchpoint is triggered. |
nyawn |
4765d 03h |
/minsoc/ |
| 155 |
Decreased wait time, for faster simulations. |
nyawn |
4765d 03h |
/minsoc/ |
| 154 |
Modified to use the new autotools support in the advanced debug system v3.0. |
nyawn |
4765d 04h |
/minsoc/ |
| 153 |
Updating installation script to download minsoc from this branche, verilator, instead of rc-1.0. |
rfajardo |
4797d 17h |
/minsoc/ |
| 152 |
Roll back to retrieve minsoc from branches/rc-1.0. |
rfajardo |
4797d 17h |
/minsoc/ |
| 151 |
Creating tag release-1.0 from revision 150 of branches/rc-1.0. |
rfajardo |
4797d 17h |
/minsoc/ |
| 150 |
Updating installation script to retrieve minsoc from tags/release-1.0. |
rfajardo |
4797d 17h |
/minsoc/ |
| 149 |
Merging differences of release candidate 1.0 revision 140:148 with trunk. |
rfajardo |
4797d 18h |
/minsoc/ |
| 148 |
Renaming minsoc_wave.lxt to minsoc_wave.lxt2 for correctness. |
rfajardo |
4802d 14h |
/minsoc/ |
| 147 |
Updating minsoc_bench.v to correctly acquire uart data.
Uart drivers: when an end of line character was sent, the driver appended a carriage return to it. This is not necessary and has been removed.
-Eth and Uart firmwares also had a carriage return after the end of line, also removed.
Minsoc_bench_defines.v: Renaming VCD_OUTPUT define to WAVEFORM_OUTPUT
run_bench: selecting -lxt2 for waveform output format. This output format size is 10 times smaller than vcd.
minsoc-install.sh: lxt2 output format requires that Icarus Verilog be installed with zlib support. For that, we now check if zlib is supported on script run. |
rfajardo |
4802d 16h |
/minsoc/ |
| 146 |
Importing 'Xilinx Microblaze Dev. Kit 1600E Edition' board configuration directory. |
ConX. |
4802d 21h |
/minsoc/ |
