OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] - Rev 76

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
56 Macros for all Altera family devices and pll instantiation javieralso 4761d 16h /minsoc
55 Adjusting Makefiles to compile correctly with new firmware updates.

1) except.o not included into libsupport.a.
2) libsupport.a linked to except.o, now in correct order: ld libsupport.a except.o -o executable (not the other way around)
3) int.c was not being compiled because of a #ifdef which is not set anywhere		 rfajardo 4763d 01h /minsoc
54 Moving spr_defs.h to or1200.h ConX. 4763d 02h /minsoc
53 Indentation, deleting redundant files and adding externals ConX. 4763d 04h /minsoc
52 Altera ALTPLL Megafunction Instantiation javieralso 4771d 18h /minsoc
51 sw/support/uart.c: Changing the order of writes to the Divisor Latch of UART. (Thanks Ramkumar) rfajardo 4778d 06h /minsoc
50 Removing unused firmware files, respective to or1ksim actually.

Removing the inclusion of the removed file mc.h in reset.S, probably required by or1ksim at some point.

Reworked except.S to use a macro instead of repeating the same procedure 16 times or so. Explanation added to the macro as a leading comment.		 rfajardo 4790d 03h /minsoc
49 Language correction for README.txt. rfajardo 4792d 01h /minsoc
48 Clear some old docs that are already ported to MinSOC's Wiki ConX. 4792d 02h /minsoc
47 Firmware updated to work with gcc-4.5. It is actually working just fine and gcc-4.5 assembly code seems a lot cleaner.

I noticed that by increasing the free stack space for the interrupt handler by 130 made the resulting firmware not work. I assume it is because 130 is not aligned 130%4 = 2 and the stack simply does not work then. Instead I'm freeing the previous 116 plus 128 (for 32 registers as mentioned by Jeremy) and it works.		 rfajardo 4793d 00h /minsoc

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.