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Rev Log message Author Age Path
95 Makefile for Altera FPGAs fixed javieralso 4620d 16h /minsoc/branches/rc-1.0/
94 Fix bug in minsoc_top.prj for Altera synthesis javieralso 4623d 01h /minsoc/branches/rc-1.0/
93 Support for Altera synthesis. It needs some tune, but it works fine javieralso 4623d 04h /minsoc/branches/rc-1.0/
92 backend/spartan3e_starter_kit*: or1200_defines.v file was outdated and hindering synthesis. Probably it would be best if we used a patching system here. But for now, I copied the new files and made the necessary changes to fit the system into the target boards. rfajardo 4624d 02h /minsoc/branches/rc-1.0/
91 prj/scripts/: Changing scripts not to include multiple timescale.v files from different listed directories in the project definition file. Instead, now the internal loop which look for the file in different directories is broken when the first file is found. rfajardo 4624d 02h /minsoc/branches/rc-1.0/
90 After minsoc_top.prj update, make regenerated src and xst files. rfajardo 4624d 18h /minsoc/branches/rc-1.0/
89 minsoc_top.prj was splited into minsoc_top and minsoc_bench. minsoc_top still had directory entries of bench, they are gone now. rfajardo 4624d 18h /minsoc/branches/rc-1.0/
88 Project structure, Xilinx Makefiles and simulation working. rfajardo 4624d 18h /minsoc/branches/rc-1.0/
87 Synchronizing scripts to behave exactly the same. rfajardo 4624d 19h /minsoc/branches/rc-1.0/
86 Updating configure script messages. rfajardo 4624d 20h /minsoc/branches/rc-1.0/
85 Central project definition under prj. Synthesis and simulation take their project files from here. rfajardo 4624d 20h /minsoc/branches/rc-1.0/
84 syn/blackboxes/eth_top.v:
-module is now called ethmac instead of eth_top
-eth_defines.v is now called ethmac_defines.v		 rfajardo 4625d 20h /minsoc/branches/rc-1.0/
83 minsoc-install.sh: bzip2 program was being used, but its existance on target system was not being verified. It is now. rfajardo 4637d 02h /minsoc/branches/rc-1.0/
82 minsoc-install.sh: problems with copying the GNU Toolchain from download to tools. We uncompress the GNU Toolchain now once again to tools during the installation part. rfajardo 4640d 01h /minsoc/branches/rc-1.0/
81 Installation script complete, nice text feedback, output logs and better execution order. rfajardo 4640d 12h /minsoc/branches/rc-1.0/
80 Establishing a better Makefile system for firmwares. rfajardo 4643d 00h /minsoc/branches/rc-1.0/
79 minsoc-install.sh: rpath corrected.
required-cygwin-tools: updated		 rfajardo 4643d 17h /minsoc/branches/rc-1.0/
78 minsoc-install.sh: Advanced JTAG bridge compilation needs to know where the dynamic libraries are on runtime. Patching (sed) the Makefile to compile it with the rpath to the libraries (libusb/libftdi). rfajardo 4643d 17h /minsoc/branches/rc-1.0/
77 New tool requirements for installing Icarus Verilog. rfajardo 4643d 17h /minsoc/branches/rc-1.0/
76 Including a script allowing the installation of MinSoC and all its required tools.

It should be working for all Linuxes and Cygwin.		 rfajardo 4643d 18h /minsoc/branches/rc-1.0/

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