OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [prj/] [sim/] - Rev 114

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
109 Creating a branche for release candidate 1.0. rfajardo 3743d 23h /minsoc/branches/rc-1.0/prj/sim/
97 As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board. rfajardo 3788d 10h /minsoc/branches/rc-1.0/prj/sim/
91 prj/scripts/: Changing scripts not to include multiple timescale.v files from different listed directories in the project definition file. Instead, now the internal loop which look for the file in different directories is broken when the first file is found. rfajardo 3793d 10h /minsoc/branches/rc-1.0/prj/sim/
90 After minsoc_top.prj update, make regenerated src and xst files. rfajardo 3794d 01h /minsoc/branches/rc-1.0/prj/sim/
88 Project structure, Xilinx Makefiles and simulation working. rfajardo 3794d 02h /minsoc/branches/rc-1.0/prj/sim/
85 Central project definition under prj. Synthesis and simulation take their project files from here. rfajardo 3794d 03h /minsoc/branches/rc-1.0/prj/sim/

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.